See: Thinking Concurrently

Fetch

• The program counter (PC) passes the address of the current instruction to the memory address register (MAR)
• It then increments to hold the address of the next instruction to be executed
• The address (in MAR) is then sent along the memory bus to main memory, where it waits to receive a signal from the control bus
  • To ensure that the data is stored in the correct memory address, the control unit sends a read signal along the control bus to main memory
    • The control bus sends a grant signal to permit reading the address
    • Then a read signal is sent
    • The control bus sends a grant signal to permit reading the data at the address
• The data is then sent along the data bus to the memory data register (MDR)
  • The data will then be copied over to the current instruction register (CIR)

Decode

See: Little Man Computing, Memory Addressing

• Control unit (CU) decodes instruction content
  • I.e., 0101 1101
  • Opcode: 0101 = load
  • Operand: 1101 = pointer/data

Execute

May be done by either the CU or arithmetic logic unit (ALU).

• If needed, send the operand address to the MAR, send along, … repeats data read actions
  • Data is now stored in MDR
  • MDR is now coped into accumulator